[cairo] [pixman] C optimization for x888->0565
Vladimir Vukicevic
vladimir at pobox.com
Wed Sep 10 12:06:27 PDT 2008
Maybe, but I don't think it's critical -- on most processors where MMX/
SSE2 are available, chances are we'll be running with a 24bpp
display. Though I guess that might not be true given Intel's Atom...
Or, I guess, xscale with WiMMX. I mean, it can't hurt, but I wouldn't
make it a priority :)
- Vlad
On Sep 10, 2008, at 11:37 AM, André Tupinambá wrote:
> Hi Vlad,
>
> Makes sense to create the MMX and SSE2 versions of this fast paths?
>
> Regards,
>
> André Tupinambá
>
> On Sat, Sep 6, 2008 at 9:57 PM, Vladimir Vukicevic
> <vladimir at pobox.com> wrote:
>>
>> Howdy,
>>
>> The x8r8g8b8 -> r5g6b5 with operator source case was going through
>> composite_general, complete with fbFetch_x8r8g8b8's and
>> fbStore_r5g6b5's.
>> Youch. This case happens pretty commonly when an app is using a 24-
>> bpp
>> surface as a backbuffer when it does the final blit to a 16bpp X
>> server as
>> part of expose handling.
>>
>> This can maybe be done faster on arm with assembly (where it'll get
>> the most
>> use), but Jeff can do that better than me if it's necessary --
>> looking at
>> gcc's code, it doesn't look awful.
>>
>> - Vlad
>>
>>
>>
>>
>>
>>
>>
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