[PATCH 16/25] doc: avoid confusing gtk-doc by double asterisks
Nis Martensen
nis.martensen at web.de
Sun Mar 4 04:20:15 PST 2012
---
src/drm/cairo-drm-i915-private.h | 24 +++---
src/drm/cairo-drm-i965-shader.c | 4 +-
src/drm/cairo-drm-intel-brw-eu.c | 26 +++---
src/drm/cairo-drm-intel-brw-eu.h | 50 ++++++------
src/drm/cairo-drm-intel-ioctl-private.h | 126 +++++++++++++++---------------
5 files changed, 115 insertions(+), 115 deletions(-)
diff --git a/src/drm/cairo-drm-i915-private.h b/src/drm/cairo-drm-i915-private.h
index 1581cab..8b2e422 100644
--- a/src/drm/cairo-drm-i915-private.h
+++ b/src/drm/cairo-drm-i915-private.h
@@ -343,7 +343,7 @@ enum i915_fs_channel {
(z##_CHANNEL_VAL << Z_CHANNEL_SHIFT) | \
(w##_CHANNEL_VAL << W_CHANNEL_SHIFT)
-/**
+/*
* Construct an operand description for using a register with no swizzling
*/
#define i915_fs_operand_reg(reg) \
@@ -352,17 +352,17 @@ enum i915_fs_channel {
#define i915_fs_operand_reg_negate(reg) \
i915_fs_operand(reg, NEG_X, NEG_Y, NEG_Z, NEG_W)
-/**
+/*
* Returns an operand containing (0.0, 0.0, 0.0, 0.0).
*/
#define i915_fs_operand_zero() i915_fs_operand(FS_R0, ZERO, ZERO, ZERO, ZERO)
-/**
+/*
* Returns an unused operand
*/
#define i915_fs_operand_none() i915_fs_operand_zero()
-/**
+/*
* Returns an operand containing (1.0, 1.0, 1.0, 1.0).
*/
#define i915_fs_operand_one() i915_fs_operand(FS_R0, ONE, ONE, ONE, ONE)
@@ -370,7 +370,7 @@ enum i915_fs_channel {
#define i915_get_hardware_channel_val(val, shift, negate) \
(((val & 0x7) << shift) | ((val & 0x8) ? negate : 0))
-/**
+/*
* Outputs a fragment shader command to declare a sampler or texture register.
*/
#define i915_fs_dcl(reg) \
@@ -527,19 +527,19 @@ do { \
i915_fs_operand_none(), \
i915_fs_operand_none())
-/** Add operand0 and operand1 and put the result in dest_reg */
+/* Add operand0 and operand1 and put the result in dest_reg */
#define i915_fs_add(dest_reg, operand0, operand1) \
i915_fs_arith (ADD, dest_reg, \
operand0, operand1, \
i915_fs_operand_none())
-/** Multiply operand0 and operand1 and put the result in dest_reg */
+/* Multiply operand0 and operand1 and put the result in dest_reg */
#define i915_fs_mul(dest_reg, operand0, operand1) \
i915_fs_arith (MUL, dest_reg, \
operand0, operand1, \
i915_fs_operand_none())
-/** Computes 1/sqrt(operand0.replicate_swizzle) puts the result in dest_reg */
+/* Computes 1/sqrt(operand0.replicate_swizzle) puts the result in dest_reg */
#define i915_fs_rsq(dest_reg, dest_mask, operand0) \
do { \
if (dest_mask) { \
@@ -555,13 +555,13 @@ do { \
} \
} while (0)
-/** Puts the minimum of operand0 and operand1 in dest_reg */
+/* Puts the minimum of operand0 and operand1 in dest_reg */
#define i915_fs_min(dest_reg, operand0, operand1) \
i915_fs_arith (MIN, dest_reg, \
operand0, operand1, \
i915_fs_operand_none())
-/** Puts the maximum of operand0 and operand1 in dest_reg */
+/* Puts the maximum of operand0 and operand1 in dest_reg */
#define i915_fs_max(dest_reg, operand0, operand1) \
i915_fs_arith (MAX, dest_reg, \
operand0, operand1, \
@@ -570,7 +570,7 @@ do { \
#define i915_fs_cmp(dest_reg, operand0, operand1, operand2) \
i915_fs_arith (CMP, dest_reg, operand0, operand1, operand2)
-/** Perform operand0 * operand1 + operand2 and put the result in dest_reg */
+/* Perform operand0 * operand1 + operand2 and put the result in dest_reg */
#define i915_fs_mad(dest_reg, dest_mask, op0, op1, op2) \
do { \
if (dest_mask) { \
@@ -589,7 +589,7 @@ do { \
} \
} while (0)
-/**
+/*
* Perform a 3-component dot-product of operand0 and operand1 and put the
* resulting scalar in the channels of dest_reg specified by the dest_mask.
*/
diff --git a/src/drm/cairo-drm-i965-shader.c b/src/drm/cairo-drm-i965-shader.c
index f88e5a4..5465f42 100644
--- a/src/drm/cairo-drm-i965-shader.c
+++ b/src/drm/cairo-drm-i965-shader.c
@@ -939,7 +939,7 @@ i965_shader_setup_constants (i965_shader_t *shader)
assert (shader->constants_size < ARRAY_LENGTH (shader->constants));
}
-/**
+/*
* Highest-valued BLENDFACTOR used in i965_blend_op.
*
* This leaves out BRW_BLENDFACTOR_INV_DST_COLOR,
@@ -1630,7 +1630,7 @@ i965_sf_state_equal (const void *A, const void *B)
return a->hash == b->hash;
}
-/**
+/*
* Sets up the SF state pointing at an SF kernel.
*
* The SF kernel does coord interp: for each attribute,
diff --git a/src/drm/cairo-drm-intel-brw-eu.c b/src/drm/cairo-drm-intel-brw-eu.c
index 51c3de4..2b47d8c 100644
--- a/src/drm/cairo-drm-intel-brw-eu.c
+++ b/src/drm/cairo-drm-intel-brw-eu.c
@@ -127,7 +127,7 @@ brw_get_program (struct brw_compile *p,
-/**
+/*
* Subroutine calls require special attention.
* Mesa instructions may be expanded into multiple hardware instructions
* so the prog_instruction::BranchTarget field can't be used as an index
@@ -142,29 +142,29 @@ brw_get_program (struct brw_compile *p,
*/
-/**
+/*
* For each OPCODE_BGNSUB we create one of these.
*/
struct brw_glsl_label
{
- const char *name; /**< the label string */
- uint32_t position; /**< the position of the brw instruction for this label */
- struct brw_glsl_label *next; /**< next in linked list */
+ const char *name; /*< the label string */
+ uint32_t position; /*< the position of the brw instruction for this label */
+ struct brw_glsl_label *next; /*< next in linked list */
};
-/**
+/*
* For each OPCODE_CAL we create one of these.
*/
struct brw_glsl_call
{
- uint32_t call_inst_pos; /**< location of the CAL instruction */
- const char *sub_name; /**< name of subroutine to call */
- struct brw_glsl_call *next; /**< next in linked list */
+ uint32_t call_inst_pos; /*< location of the CAL instruction */
+ const char *sub_name; /*< name of subroutine to call */
+ struct brw_glsl_call *next; /*< next in linked list */
};
-/**
+/*
* Called for each OPCODE_BGNSUB.
*/
void
@@ -178,7 +178,7 @@ brw_save_label(struct brw_compile *c, const char *name, uint32_t position)
}
-/**
+/*
* Called for each OPCODE_CAL.
*/
void
@@ -192,7 +192,7 @@ brw_save_call(struct brw_compile *c, const char *name, uint32_t call_pos)
}
-/**
+/*
* Lookup a label, return label's position/offset.
*/
static uint32_t
@@ -209,7 +209,7 @@ brw_lookup_label(struct brw_compile *c, const char *name)
}
-/**
+/*
* When we're done generating code, this function is called to resolve
* subroutine calls.
*/
diff --git a/src/drm/cairo-drm-intel-brw-eu.h b/src/drm/cairo-drm-intel-brw-eu.h
index 197a371..2662a2e 100644
--- a/src/drm/cairo-drm-intel-brw-eu.h
+++ b/src/drm/cairo-drm-intel-brw-eu.h
@@ -38,7 +38,7 @@
#include <assert.h>
-/**
+/*
* Writemask values, 1 bit per component.
*/
#define WRITEMASK_X 0x1
@@ -127,8 +127,8 @@ struct brw_compile {
int single_program_flow;
struct brw_context *brw;
- struct brw_glsl_label *first_label; /**< linked list of labels */
- struct brw_glsl_call *first_call; /**< linked list of CALs */
+ struct brw_glsl_label *first_label; /*< linked list of labels */
+ struct brw_glsl_call *first_call; /*< linked list of CALs */
};
cairo_private void
@@ -164,7 +164,7 @@ type_sz (uint32_t type)
}
}
-/**
+/*
* Construct a brw_reg.
* \param file one of the BRW_x_REGISTER_FILE values
* \param nr register number/index
@@ -222,7 +222,7 @@ brw_reg (uint32_t file,
return reg;
}
-/** Construct float[16] register */
+/* Construct float[16] register */
static cairo_always_inline struct brw_reg
brw_vec16_reg (uint32_t file,
uint32_t nr,
@@ -237,7 +237,7 @@ brw_vec16_reg (uint32_t file,
WRITEMASK_XYZW);
}
-/** Construct float[8] register */
+/* Construct float[8] register */
static cairo_always_inline struct brw_reg
brw_vec8_reg (uint32_t file,
uint32_t nr,
@@ -252,7 +252,7 @@ brw_vec8_reg (uint32_t file,
WRITEMASK_XYZW);
}
-/** Construct float[4] register */
+/* Construct float[4] register */
static cairo_always_inline struct brw_reg
brw_vec4_reg (uint32_t file,
uint32_t nr,
@@ -267,7 +267,7 @@ brw_vec4_reg (uint32_t file,
WRITEMASK_XYZW);
}
-/** Construct float[2] register */
+/* Construct float[2] register */
static cairo_always_inline struct brw_reg
brw_vec2_reg (uint32_t file,
uint32_t nr,
@@ -282,7 +282,7 @@ brw_vec2_reg (uint32_t file,
WRITEMASK_XY);
}
-/** Construct float[1] register */
+/* Construct float[1] register */
static cairo_always_inline struct brw_reg
brw_vec1_reg (uint32_t file,
uint32_t nr,
@@ -331,7 +331,7 @@ byte_offset (struct brw_reg reg,
return reg;
}
-/** Construct unsigned word[16] register */
+/* Construct unsigned word[16] register */
static cairo_always_inline struct brw_reg
brw_uw16_reg (uint32_t file,
uint32_t nr,
@@ -340,7 +340,7 @@ brw_uw16_reg (uint32_t file,
return suboffset (retype (brw_vec16_reg (file, nr, 0), BRW_REGISTER_TYPE_UW), subnr);
}
-/** Construct unsigned word[8] register */
+/* Construct unsigned word[8] register */
static cairo_always_inline struct brw_reg
brw_uw8_reg (uint32_t file,
uint32_t nr,
@@ -349,7 +349,7 @@ brw_uw8_reg (uint32_t file,
return suboffset (retype (brw_vec8_reg (file, nr, 0), BRW_REGISTER_TYPE_UW), subnr);
}
-/** Construct unsigned word[2] register */
+/* Construct unsigned word[2] register */
static cairo_always_inline struct brw_reg
brw_uw2_reg (uint32_t file,
uint32_t nr,
@@ -358,7 +358,7 @@ brw_uw2_reg (uint32_t file,
return suboffset (retype (brw_vec2_reg (file, nr, 0), BRW_REGISTER_TYPE_UW), subnr);
}
-/** Construct unsigned word[1] register */
+/* Construct unsigned word[1] register */
static cairo_always_inline struct brw_reg
brw_uw1_reg (uint32_t file,
uint32_t nr,
@@ -381,7 +381,7 @@ brw_imm_reg (uint32_t type)
0);
}
-/** Construct float immediate register */
+/* Construct float immediate register */
static cairo_always_inline struct brw_reg brw_imm_f( float f )
{
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_F);
@@ -389,7 +389,7 @@ static cairo_always_inline struct brw_reg brw_imm_f( float f )
return imm;
}
-/** Construct integer immediate register */
+/* Construct integer immediate register */
static cairo_always_inline struct brw_reg brw_imm_d( int32_t d )
{
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_D);
@@ -397,7 +397,7 @@ static cairo_always_inline struct brw_reg brw_imm_d( int32_t d )
return imm;
}
-/** Construct uint immediate register */
+/* Construct uint immediate register */
static cairo_always_inline struct brw_reg brw_imm_ud( uint32_t ud )
{
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UD);
@@ -405,7 +405,7 @@ static cairo_always_inline struct brw_reg brw_imm_ud( uint32_t ud )
return imm;
}
-/** Construct ushort immediate register */
+/* Construct ushort immediate register */
static cairo_always_inline struct brw_reg brw_imm_uw( uint16_t uw )
{
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UW);
@@ -413,7 +413,7 @@ static cairo_always_inline struct brw_reg brw_imm_uw( uint16_t uw )
return imm;
}
-/** Construct short immediate register */
+/* Construct short immediate register */
static cairo_always_inline struct brw_reg brw_imm_w( int16_t w )
{
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_W);
@@ -425,7 +425,7 @@ static cairo_always_inline struct brw_reg brw_imm_w( int16_t w )
* numbers alias with _V and _VF below:
*/
-/** Construct vector of eight signed half-byte values */
+/* Construct vector of eight signed half-byte values */
static cairo_always_inline
struct brw_reg brw_imm_v (uint32_t v)
{
@@ -437,7 +437,7 @@ struct brw_reg brw_imm_v (uint32_t v)
return imm;
}
-/** Construct vector of four 8-bit float values */
+/* Construct vector of four 8-bit float values */
static cairo_always_inline struct brw_reg
brw_imm_vf (uint32_t v)
{
@@ -476,28 +476,28 @@ brw_address (struct brw_reg reg)
return brw_imm_uw (reg.nr * REG_SIZE + reg.subnr);
}
-/** Construct float[1] general-purpose register */
+/* Construct float[1] general-purpose register */
static cairo_always_inline struct brw_reg
brw_vec1_grf (uint32_t nr, uint32_t subnr)
{
return brw_vec1_reg (BRW_GENERAL_REGISTER_FILE, nr, subnr);
}
-/** Construct float[2] general-purpose register */
+/* Construct float[2] general-purpose register */
static cairo_always_inline struct brw_reg
brw_vec2_grf (uint32_t nr, uint32_t subnr)
{
return brw_vec2_reg (BRW_GENERAL_REGISTER_FILE, nr, subnr);
}
-/** Construct float[4] general-purpose register */
+/* Construct float[4] general-purpose register */
static cairo_always_inline struct brw_reg
brw_vec4_grf (uint32_t nr, uint32_t subnr)
{
return brw_vec4_reg (BRW_GENERAL_REGISTER_FILE, nr, subnr);
}
-/** Construct float[8] general-purpose register */
+/* Construct float[8] general-purpose register */
static cairo_always_inline struct brw_reg
brw_vec8_grf (uint32_t nr)
{
@@ -516,7 +516,7 @@ brw_uw16_grf (uint32_t nr, uint32_t subnr)
return brw_uw16_reg (BRW_GENERAL_REGISTER_FILE, nr, subnr);
}
-/** Construct null register (usually used for setting condition codes) */
+/* Construct null register (usually used for setting condition codes) */
static cairo_always_inline struct brw_reg
brw_null_reg (void)
{
diff --git a/src/drm/cairo-drm-intel-ioctl-private.h b/src/drm/cairo-drm-intel-ioctl-private.h
index 29fe88a..004d3bf 100644
--- a/src/drm/cairo-drm-intel-ioctl-private.h
+++ b/src/drm/cairo-drm-intel-ioctl-private.h
@@ -48,28 +48,28 @@ struct intel_getparam {
};
-/** @{
+/* @{
* Intel memory domains
*
* Most of these just align with the various caches in
* the system and are used to flush and invalidate as
* objects end up cached in different domains.
*/
-/** CPU cache */
+/* CPU cache */
#define I915_GEM_DOMAIN_CPU 0x00000001
-/** Render cache, used by 2D and 3D drawing */
+/* Render cache, used by 2D and 3D drawing */
#define I915_GEM_DOMAIN_RENDER 0x00000002
-/** Sampler cache, used by texture engine */
+/* Sampler cache, used by texture engine */
#define I915_GEM_DOMAIN_SAMPLER 0x00000004
-/** Command queue, used to load batch buffers */
+/* Command queue, used to load batch buffers */
#define I915_GEM_DOMAIN_COMMAND 0x00000008
-/** Instruction cache, used by shader programs */
+/* Instruction cache, used by shader programs */
#define I915_GEM_DOMAIN_INSTRUCTION 0x00000010
-/** Vertex address cache */
+/* Vertex address cache */
#define I915_GEM_DOMAIN_VERTEX 0x00000020
-/** GTT domain - aperture and scanout */
+/* GTT domain - aperture and scanout */
#define I915_GEM_DOMAIN_GTT 0x00000040
-/** @} */
+/* @} */
#define I915_TILING_NONE 0
#define I915_TILING_X 1
@@ -95,13 +95,13 @@ struct intel_getparam {
#define DRM_I915_GEM_MMAP_GTT 0x24
struct drm_i915_gem_create {
- /**
+ /*
* Requested size for the object.
*
* The (page-aligned) allocated size for the object will be returned.
*/
uint64_t size;
- /**
+ /*
* Returned handle for the object.
*
* Object handles are nonzero.
@@ -111,14 +111,14 @@ struct drm_i915_gem_create {
};
struct drm_i915_gem_pread {
- /** Handle for the object being read. */
+ /* Handle for the object being read. */
uint32_t handle;
uint32_t pad;
- /** Offset into the object to read from */
+ /* Offset into the object to read from */
uint64_t offset;
- /** Length of data to read */
+ /* Length of data to read */
uint64_t size;
- /**
+ /*
* Pointer to write the data into.
*
* This is a fixed-size type for 32/64 compatibility.
@@ -127,14 +127,14 @@ struct drm_i915_gem_pread {
};
struct drm_i915_gem_pwrite {
- /** Handle for the object being written to. */
+ /* Handle for the object being written to. */
uint32_t handle;
uint32_t pad;
- /** Offset into the object to write to */
+ /* Offset into the object to write to */
uint64_t offset;
- /** Length of data to write */
+ /* Length of data to write */
uint64_t size;
- /**
+ /*
* Pointer to read the data from.
*
* This is a fixed-size type for 32/64 compatibility.
@@ -143,18 +143,18 @@ struct drm_i915_gem_pwrite {
};
struct drm_i915_gem_mmap {
- /** Handle for the object being mapped. */
+ /* Handle for the object being mapped. */
uint32_t handle;
uint32_t pad;
- /** Offset in the object to map. */
+ /* Offset in the object to map. */
uint64_t offset;
- /**
+ /*
* Length of data to map.
*
* The value will be page-aligned.
*/
uint64_t size;
- /**
+ /*
* Returned pointer the data was mapped at.
*
* This is a fixed-size type for 32/64 compatibility.
@@ -163,10 +163,10 @@ struct drm_i915_gem_mmap {
};
struct drm_i915_gem_mmap_gtt {
- /** Handle for the object being mapped. */
+ /* Handle for the object being mapped. */
uint32_t handle;
uint32_t pad;
- /**
+ /*
* Fake offset to use for subsequent mmap call
*
* This is a fixed-size type for 32/64 compatibility.
@@ -175,18 +175,18 @@ struct drm_i915_gem_mmap_gtt {
};
struct drm_i915_gem_set_domain {
- /** Handle for the object */
+ /* Handle for the object */
uint32_t handle;
- /** New read domains */
+ /* New read domains */
uint32_t read_domains;
- /** New write domain */
+ /* New write domain */
uint32_t write_domain;
};
struct drm_i915_gem_relocation_entry {
- /**
+ /*
* Handle of the buffer being pointed to by this relocation entry.
*
* It's appealing to make this be an index into the mm_validate_entry
@@ -196,16 +196,16 @@ struct drm_i915_gem_relocation_entry {
*/
uint32_t target_handle;
- /**
+ /*
* Value to be added to the offset of the target buffer to make up
* the relocation entry.
*/
uint32_t delta;
- /** Offset in the buffer the relocation entry will be written into */
+ /* Offset in the buffer the relocation entry will be written into */
uint64_t offset;
- /**
+ /*
* Offset value of the target buffer that the relocation entry was last
* written as.
*
@@ -215,12 +215,12 @@ struct drm_i915_gem_relocation_entry {
*/
uint64_t presumed_offset;
- /**
+ /*
* Target memory domains read by this operation.
*/
uint32_t read_domains;
- /**
+ /*
* Target memory domains written by this operation.
*
* Note that only one domain may be written by the whole
@@ -231,24 +231,24 @@ struct drm_i915_gem_relocation_entry {
};
struct drm_i915_gem_exec_object {
- /**
+ /*
* User's handle for a buffer to be bound into the GTT for this
* operation.
*/
uint32_t handle;
- /** Number of relocations to be performed on this buffer */
+ /* Number of relocations to be performed on this buffer */
uint32_t relocation_count;
- /**
+ /*
* Pointer to array of struct drm_i915_gem_relocation_entry containing
* the relocations to be performed in this buffer.
*/
uint64_t relocs_ptr;
- /** Required alignment in graphics aperture */
+ /* Required alignment in graphics aperture */
uint64_t alignment;
- /**
+ /*
* Returned value of the updated offset of the object, for future
* presumed_offset writes.
*/
@@ -256,7 +256,7 @@ struct drm_i915_gem_exec_object {
};
struct drm_i915_gem_execbuffer {
- /**
+ /*
* List of buffers to be validated with their relocations to be
* performend on them.
*
@@ -269,30 +269,30 @@ struct drm_i915_gem_execbuffer {
uint64_t buffers_ptr;
uint32_t buffer_count;
- /** Offset in the batchbuffer to start execution from. */
+ /* Offset in the batchbuffer to start execution from. */
uint32_t batch_start_offset;
- /** Bytes used in batchbuffer from batch_start_offset */
+ /* Bytes used in batchbuffer from batch_start_offset */
uint32_t batch_len;
uint32_t DR1;
uint32_t DR4;
uint32_t num_cliprects;
- /** This is a struct drm_clip_rect *cliprects */
+ /* This is a struct drm_clip_rect *cliprects */
uint64_t cliprects_ptr;
};
struct drm_i915_gem_busy {
- /** Handle of the buffer to check for busy */
+ /* Handle of the buffer to check for busy */
uint32_t handle;
- /** Return busy status (1 if busy, 0 if idle) */
+ /* Return busy status (1 if busy, 0 if idle) */
uint32_t busy;
};
struct drm_i915_gem_set_tiling {
- /** Handle of the buffer to have its tiling state updated */
+ /* Handle of the buffer to have its tiling state updated */
uint32_t handle;
- /**
+ /*
* Tiling mode for the object (I915_TILING_NONE, I915_TILING_X,
* I915_TILING_Y).
*
@@ -306,13 +306,13 @@ struct drm_i915_gem_set_tiling {
*/
uint32_t tiling_mode;
- /**
+ /*
* Stride in bytes for the object when in I915_TILING_X or
* I915_TILING_Y.
*/
uint32_t stride;
- /**
+ /*
* Returned address bit 6 swizzling required for CPU access through
* mmap mapping.
*/
@@ -320,16 +320,16 @@ struct drm_i915_gem_set_tiling {
};
struct drm_i915_gem_get_tiling {
- /** Handle of the buffer to get tiling state for. */
+ /* Handle of the buffer to get tiling state for. */
uint32_t handle;
- /**
+ /*
* Current tiling mode for the object (I915_TILING_NONE, I915_TILING_X,
* I915_TILING_Y).
*/
uint32_t tiling_mode;
- /**
+ /*
* Returned address bit 6 swizzling required for CPU access through
* mmap mapping.
*/
@@ -337,10 +337,10 @@ struct drm_i915_gem_get_tiling {
};
struct drm_i915_gem_get_aperture {
- /** Total size of the aperture used by i915_gem_execbuffer, in bytes */
+ /* Total size of the aperture used by i915_gem_execbuffer, in bytes */
uint64_t aper_size;
- /**
+ /*
* Available space in the aperture used by i915_gem_execbuffer, in
* bytes
*/
@@ -377,24 +377,24 @@ struct drm_i915_gem_madvise {
/* XXX execbuffer2 */
struct drm_i915_gem_exec_object2 {
- /**
+ /*
* User's handle for a buffer to be bound into the GTT for this
* operation.
*/
uint32_t handle;
- /** Number of relocations to be performed on this buffer */
+ /* Number of relocations to be performed on this buffer */
uint32_t relocation_count;
- /**
+ /*
* Pointer to array of struct drm_i915_gem_relocation_entry containing
* the relocations to be performed in this buffer.
*/
uint64_t relocs_ptr;
- /** Required alignment in graphics aperture */
+ /* Required alignment in graphics aperture */
uint64_t alignment;
- /**
+ /*
* Returned value of the updated offset of the object, for future
* presumed_offset writes.
*/
@@ -407,20 +407,20 @@ struct drm_i915_gem_exec_object2 {
};
struct drm_i915_gem_execbuffer2 {
- /**
+ /*
* List of gem_exec_object2 structs
*/
uint64_t buffers_ptr;
uint32_t buffer_count;
- /** Offset in the batchbuffer to start execution from. */
+ /* Offset in the batchbuffer to start execution from. */
uint32_t batch_start_offset;
- /** Bytes used in batchbuffer from batch_start_offset */
+ /* Bytes used in batchbuffer from batch_start_offset */
uint32_t batch_len;
uint32_t DR1;
uint32_t DR4;
uint32_t num_cliprects;
- /** This is a struct drm_clip_rect *cliprects */
+ /* This is a struct drm_clip_rect *cliprects */
uint64_t cliprects_ptr;
uint64_t flags;
uint64_t rsvd1;
--
1.7.2.5
--------------090104080009020304000505
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Content-Disposition: attachment;
filename*0="0017-doc-describe-cairo_recording_surface_get_extents.patch.";
filename*1="txt"
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