[cairo] [PATCH v8 20/71] drm: allow CAIRO_FORMAT_RGB30
Enrico Weigelt, metux IT consult
enrico.weigelt at gr13.net
Thu Jun 30 15:45:58 UTC 2016
Signed-off-by: Enrico Weigelt, metux IT consult <enrico.weigelt at gr13.net>
---
src/drm/cairo-drm-i915-surface.c | 15 +++++++++++++++
src/drm/cairo-drm-i965-surface.c | 2 ++
src/drm/cairo-drm-intel-surface.c | 1 +
src/drm/cairo-drm-intel.c | 7 +++++++
src/drm/cairo-drm-radeon-surface.c | 2 ++
5 files changed, 27 insertions(+)
diff --git a/src/drm/cairo-drm-i915-surface.c b/src/drm/cairo-drm-i915-surface.c
index f697faf..6048bb5 100644
--- a/src/drm/cairo-drm-i915-surface.c
+++ b/src/drm/cairo-drm-i915-surface.c
@@ -1076,6 +1076,7 @@ i915_blt (i915_surface_t *src,
break;
case CAIRO_FORMAT_RGB24:
case CAIRO_FORMAT_ARGB32:
+ case CAIRO_FORMAT_RGB30:
br13 |= BR13_8888;
cmd |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
break;
@@ -1157,6 +1158,7 @@ i915_clear_boxes (i915_surface_t *dst,
case CAIRO_FORMAT_RGB24:
clear = 0xff000000;
case CAIRO_FORMAT_ARGB32:
+ case CAIRO_FORMAT_RGB30:
br13 |= BR13_8888;
cmd |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
break;
@@ -1353,6 +1355,7 @@ i915_blt_boxes (i915_surface_t *dst,
break;
case CAIRO_FORMAT_RGB24:
case CAIRO_FORMAT_ARGB32:
+ case CAIRO_FORMAT_RGB30:
br13 |= BR13_8888;
cmd |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
break;
@@ -1697,6 +1700,7 @@ i915_surface_clear (i915_surface_t *dst)
case CAIRO_FORMAT_RGB24:
clear = 0xff000000;
case CAIRO_FORMAT_ARGB32:
+ case CAIRO_FORMAT_RGB30:
br13 |= BR13_8888;
cmd |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
break;
@@ -2395,6 +2399,10 @@ i915_surface_init (i915_surface_t *surface,
surface->map0 = MAPSURF_32BIT | MT_32BIT_ARGB8888;
surface->colorbuf = COLR_BUF_ARGB8888 | DEPTH_FRMT_24_FIXED_8_OTHER;
break;
+ case CAIRO_FORMAT_RGB30:
+ surface->map0 = MAPSURF_32BIT | MT_32BIT_ARGB2101010;
+ surface->colorbuf = COLR_BUF_ARGB8888 | DEPTH_FRMT_24_FIXED_8_OTHER;
+ break;
case CAIRO_FORMAT_RGB24:
surface->map0 = MAPSURF_32BIT | MT_32BIT_XRGB8888;
surface->colorbuf = COLR_BUF_ARGB8888 | DEPTH_FRMT_24_FIXED_8_OTHER;
@@ -2503,6 +2511,7 @@ i915_surface_create (cairo_drm_device_t *base_dev,
case CAIRO_FORMAT_RGB16_565:
case CAIRO_FORMAT_RGB24:
case CAIRO_FORMAT_A8:
+ case CAIRO_FORMAT_RGB30:
break;
case CAIRO_FORMAT_INVALID:
default:
@@ -2538,6 +2547,7 @@ i915_surface_create_for_name (cairo_drm_device_t *base_dev,
case CAIRO_FORMAT_ARGB32:
case CAIRO_FORMAT_RGB16_565:
case CAIRO_FORMAT_RGB24:
+ case CAIRO_FORMAT_RGB30:
case CAIRO_FORMAT_A8:
break;
}
@@ -2587,6 +2597,10 @@ i915_buffer_cache_init (intel_buffer_cache_t *cache,
case CAIRO_FORMAT_RGB24:
case CAIRO_FORMAT_RGB16_565:
ASSERT_NOT_REACHED;
+ case CAIRO_FORMAT_RGB30:
+ cache->buffer.map0 = MAPSURF_32BIT | MT_32BIT_ARGB2101010;
+ stride = width * 4;
+ break;
case CAIRO_FORMAT_ARGB32:
cache->buffer.map0 = MAPSURF_32BIT | MT_32BIT_ARGB8888;
stride = width * 4;
@@ -2669,6 +2683,7 @@ i915_surface_create_from_cacheable_image_internal (i915_device_t *device,
case CAIRO_FORMAT_ARGB32:
case CAIRO_FORMAT_RGB24:
case CAIRO_FORMAT_RGB16_565:
+ case CAIRO_FORMAT_RGB30:
caches = &device->image_caches[0];
format = CAIRO_FORMAT_ARGB32;
bpp = 4;
diff --git a/src/drm/cairo-drm-i965-surface.c b/src/drm/cairo-drm-i965-surface.c
index 474e646..2c55303 100644
--- a/src/drm/cairo-drm-i965-surface.c
+++ b/src/drm/cairo-drm-i965-surface.c
@@ -1615,6 +1615,7 @@ i965_surface_create (cairo_drm_device_t *device,
case CAIRO_FORMAT_ARGB32:
case CAIRO_FORMAT_RGB16_565:
case CAIRO_FORMAT_RGB24:
+ case CAIRO_FORMAT_RGB30:
case CAIRO_FORMAT_A8:
break;
case CAIRO_FORMAT_INVALID:
@@ -1649,6 +1650,7 @@ i965_surface_create_for_name (cairo_drm_device_t *base_dev,
case CAIRO_FORMAT_ARGB32:
case CAIRO_FORMAT_RGB16_565:
case CAIRO_FORMAT_RGB24:
+ case CAIRO_FORMAT_RGB30:
case CAIRO_FORMAT_A8:
break;
case CAIRO_FORMAT_INVALID:
diff --git a/src/drm/cairo-drm-intel-surface.c b/src/drm/cairo-drm-intel-surface.c
index 2ecb596..3fd319d 100644
--- a/src/drm/cairo-drm-intel-surface.c
+++ b/src/drm/cairo-drm-intel-surface.c
@@ -357,6 +357,7 @@ intel_surface_create_for_name (cairo_drm_device_t *device,
case CAIRO_FORMAT_ARGB32:
case CAIRO_FORMAT_RGB16_565:
case CAIRO_FORMAT_RGB24:
+ case CAIRO_FORMAT_RGB30:
case CAIRO_FORMAT_A8:
break;
}
diff --git a/src/drm/cairo-drm-intel.c b/src/drm/cairo-drm-intel.c
index 1e75213..be1e5c6 100644
--- a/src/drm/cairo-drm-intel.c
+++ b/src/drm/cairo-drm-intel.c
@@ -628,6 +628,7 @@ intel_bo_put_image (intel_device_t *device,
switch (src->format) {
case CAIRO_FORMAT_ARGB32:
case CAIRO_FORMAT_RGB24:
+ case CAIRO_FORMAT_RGB30:
offset += 4 * dst_x;
data += 4 * src_x;
size = 4 * width;
@@ -876,6 +877,7 @@ intel_glyph_cache_add_glyph (intel_device_t *device,
break;
case CAIRO_FORMAT_ARGB32:
+ case CAIRO_FORMAT_RGB30:
dst += 4*node->x;
width = 4*glyph_surface->width;
while (height--) {
@@ -948,6 +950,7 @@ intel_get_glyph_cache (intel_device_t *device,
switch (format) {
case CAIRO_FORMAT_ARGB32:
+ case CAIRO_FORMAT_RGB30:
cache = &device->glyph_cache[0];
format = CAIRO_FORMAT_ARGB32;
break;
@@ -1083,6 +1086,10 @@ intel_buffer_cache_init (intel_buffer_cache_t *cache,
cache->buffer.map0 = MAPSURF_32BIT | MT_32BIT_ARGB8888;
stride = width * 4;
break;
+ case CAIRO_FORMAT_RGB30:
+ cache->buffer.map0 = MAPSURF_32BIT | MT_32BIT_ARGB2101010;
+ stride = width * 4;
+ break;
case CAIRO_FORMAT_A8:
cache->buffer.map0 = MAPSURF_8BIT | MT_8BIT_I8;
stride = width;
diff --git a/src/drm/cairo-drm-radeon-surface.c b/src/drm/cairo-drm-radeon-surface.c
index df2143a..bbc493a 100644
--- a/src/drm/cairo-drm-radeon-surface.c
+++ b/src/drm/cairo-drm-radeon-surface.c
@@ -337,6 +337,7 @@ radeon_surface_create (cairo_drm_device_t *device,
case CAIRO_FORMAT_RGB16_565:
return _cairo_surface_create_in_error (_cairo_error (CAIRO_STATUS_INVALID_FORMAT));
case CAIRO_FORMAT_ARGB32:
+ case CAIRO_FORMAT_RGB30:
case CAIRO_FORMAT_RGB24:
case CAIRO_FORMAT_A8:
break;
@@ -361,6 +362,7 @@ radeon_surface_create_for_name (cairo_drm_device_t *device,
case CAIRO_FORMAT_RGB16_565:
return _cairo_surface_create_in_error (_cairo_error (CAIRO_STATUS_INVALID_FORMAT));
case CAIRO_FORMAT_ARGB32:
+ case CAIRO_FORMAT_RGB30:
case CAIRO_FORMAT_RGB24:
case CAIRO_FORMAT_A8:
break;
--
2.6.4.442.g545299f
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