[Pixman] [cairo] Floating point API in Pixman

[Jonathan Morton]

On Tue, 2010-08-17 at 11:42 -0400, James Cloos wrote:
> I suspect using floats would be *much* better than the existing fixeds
> on modern x86_64 systems.  But fixed will remain important on smaller,
> lighter systems for some time to come.

I believe so too, and I have some actual numbers to back it up.

On any modern desktop CPU with a fast (ie. one-cycle throughput or
nearly so) FPU, a floating-point multiply-add is substantially faster
than doing the same thing in fixed-point.  This is true for at least
Intel P6 family, AMD Athlon family, PowerPC (except the FPU-less 4xx
series), Cortex-A9, and Cortex-A8 if you use NEON instead of VFP
instructions (which LLVM does for single precision).

For Cortex-A8 using VFP instructions, as GCC does, it's mostly a wash -
for some unfathomable reason the FPU goes non-pipelined in this case,
even in so-called RunFast mode.  The same goes for an older ARM core
(eg. ARM11) with a VFP attached.  In both cases you get to sidestep the
limited range of fixed-point values for free.

With a sufficiently complex operation to perform, it's even worth
converting fixed-point to floating-point and back again.  "Sufficiently
complex" depends on the CPU, but on most desktop CPUs, many of the more
complex things that Pixman can do qualify.

The above doesn't take SIMD optimisations into account.  For some
architectures this pushes the balance one way, for others it goes the
other way.  For example, although Altivec and NEON have similar
capabilities for fixed-point logic, PowerPCs with Altivec can do four SP
FPMACs per cycle in the vector unit, and a fifth and/or a sixth in the
scalar FPU simultaneously (and a branch for good measure).  The NEON
unit in Cortex-A8 and A9, however, can only do two multiplies or two
adds per cycle, and the scalar FPU instructions share this hardware.
The various x86 and AMD64 CPUs also have varying capabilities.

-- 
------
From: Jonathan Morton
      jonathan.morton at movial.com